General Background information can be found in the following source: http://www.synergymwave.com/Articles/0509/default.asp, retrieved Jan. 2, 2013
Theory and Requirements of Prior Art Synthesizer Systems
Frequency synthesizers come in many shapes and sizes, from tiny system-on-a-chip (SoC) devices and compact modules to rugged military-grade rack-mount systems and bench-top instruments. Available technologies are almost as diverse as the number of package options, using analog methods, digital techniques and often a combination of the two. Frequency synthesizers have traditionally relied on a phase-locked loop (PLL) architecture in which the phase of a tunable oscillator, such as a VCO or YIG-tuned oscillator, is locked to the phase of a reference source with higher stability, such as an oven-controlled crystal oscillator (OCXO).
Basic Requirements
Bandwidth and Frequency Coverage
Bandwidth is vital to the spread of wireless multimedia, instant data, high voice quality and other key services, such as radar performance. However, it is also a limited resource, requiring the use of advanced amplitude- and phase-based modulation formats to squeeze the maximum amount of information into a given portion of bandwidth. One of the most critical components in enabling maximum bandwidth efficiency is the microwave frequency synthesizer. Modern synthesizers leverage available digital techniques to reach the level of noise, stability and resolution needed for most modern communication systems. Therefore, it may be advantageous to develop a broadband “generic” but low cost and power-efficient solution that can cover a number of applications.
Spurs and RF Output Power
Spurs are undesired artifact products generated by synthesizers at discrete frequencies and their location and level are determined by synthesizer architecture and frequency plan. Care must be taken to minimize the spurs' levels down to −80 dBc and below. The RF output power level is another key factor that drives the frequency conversion (up- and down-conversion) mechanism in mixer circuits and can range over wide limits, typically −10 to +18 dBm, although some applications may need even more power.
Phase Noise and Switching Speed
Phase noise is the prime parameter that limits the sensitivity of receivers. Synthesizer close-in phase noise and stability depend on the reference frequency standard and synthesizer topology, which derives its output from the reference. Switching speed (tuning speed) is a demanding parameter for data processing, which determines how fast the synthesizer response jumps from one desired frequency to another. The major challenge a designer faces is increasing the switching speed (<<milliseconds or even <<microseconds) of the synthesizer without sacrificing the performance (phase noise and spurious) as dictated by ongoing increasing data rates of current and later generation communication systems.
Size and Power Consumption
Compact size and low power consumption are key criteria for modern synthesizer technology. Therefore, they are a true motivation towards integrated circuits, avoiding costly, bulky and power hungry YIG-tuned synthesizers. System designers feel persistent pressure to deliver high performance synthesizers in compact size with low power-consumption, including inexpensive solutions. The above limitations (tuning speeds, power consumptions, phase noise, spurious, stability and size) present design challenges and tradeoffs and are likely to be the key driving factors towards overcoming these as well as reducing complexity and cost. Prior art systems synthesize periodic radio frequency signals in the 0-100 Giga-Hertz range. Prior art synthesizer systems can be divided into three distinct categories of electrical architecture: Direct Analog Synthesizer (DAS), Direct Digital Synthesizer (DDS) and Indirect Frequency Synthesizer (IFS).
Synthesizer Architectures
Frequency synthesizers provide the fixed and tunable signals for local oscillators in a wide range of commercial and military communications systems, including wireless base stations. Technologies for creating frequency synthesizers are diverse, from traditional analog methods using PLLs to direct digital synthesizers (DDS) that rely on high-speed digital-to-analog converters (DAC) to transform digital input words into analog output signals. While reviewing classical synthesizer architecture, the current technology trend toward increasing the flexibility and functional integration is specifically addressed as well as reducing its complexity and cost without compromising the phase noise performance and switching speed. Various synthesizer architectures along with their main characteristics are described below.
Direct Analog Synthesizers (DAS)
The function of a synthesizer is translating one or more reference signals to a number of output frequencies with a desired step size. Direct analog synthesizers are conceptualized by mixing base frequencies, followed by switched filters, as shown in FIG. 8. The base frequencies can be obtained from a low frequency high performance signal source (crystal and SAW resonator-based oscillators) or high frequency spectral pure signal source (Dielectric Resonator, Bulk Acoustic Wave Resonator, Sapphire Resonator, Metal Cavity Resonator and Coaxial Resonator-based oscillators) by frequency multiplication, division, phase locking or injection-mode locking. The advantage of DAS is low phase noise (due to high performance base frequency sources extracted from high Q-factor resonator-based oscillators: (crystal/SAW/SRO/CRO) and fast switching speed, but at the cost of step size, design complexity and overall component counts (base frequency source, mixer and filter circuits).
The alternative solution is to incorporate a DDS module at the input of the DAS to increase the minimum step size required from the direct analog approach, as shown in FIG. 9. Again the drawback of this approach is a large amount of undesired mixing products, which can be filtered out with expensive filtering hardware structures if small frequency step size and wide coverage are needed.
Although DAS techniques are a promising solution for reasonably good switching speed and phase noise performance, their applications are limited due to high cost factor.
Direct Digital Synthesizers (DDS)
In contrast to traditional concepts, DDS offers exceptionally fine resolution sub-hertz level, but at the cost of limited usable bandwidth and spurious performances. Therefore, due to bandwidth and spurs limitations, DDS techniques are not attractive for microwave applications and are generally used as a fine frequency resolution module in direct analog or indirect architecture. The above limitations can be overcome by incorporating software and hardware techniques similar to the DAS approach (large number of component counts), followed by a frequency divider, as shown in FIG. 10.
Indirect Frequency Synthesizers (IFS)
FIG. 11 shows a typical single-loop IFS, which utilizes frequency conversion (mixing) in the feedback path to improve the switching speed, phase noise and spurious performances. The drawback of a conventional IFS is degradation in the phase noise performance, due to the large division ratio N, which is required to provide a high frequency output with a fine resolution. In addition, IFS is sensitive to false lock due to undesired mixing products. Using a fractional divider, the overall loop division ratio can be reduced for improved phase noise and tuning speed characteristics.
The problem of false locking can be overcome by incorporating a digital to analog converter (DAC) to provide a sufficiently accurate coarse tune of the VCO to a reasonably correct frequency. This acquisition aid needs linear and repeatable tuning characteristics over the operating frequency band and temperature range. But DACs are noisy and adversely affect the synthesizer phase noise performance if they are not properly removed after the initial frequency acquisition.
For a given step size, fractional-N schemes enable a higher phase detector (PD) comparison frequency, resulting in improved phase noise and tuning speed characteristics. However, the main drawback of the fractional-N topology is high spurious levels due to phase errors inherent to the fractional division mechanism.
IFS architecture strongly depends on the VCO characteristics; therefore, a promising solution is to use a low phase noise and fast switching compatible VCO, including a DDS module as a fractional divider, inserted into the reference or divider path (see FIGS. 12A and 12B). This approach leads to a complex hardware architecture, but offers a cost-effective high performance solution. Although high performance synthesizer compatible VCO solutions complicate the overall design philosophy, the complexity can be effectively spread and optimized, which leads to a high performance and reasonably priced frequency generation and synthesis solutions for current and later generation communication systems.
Synthesizer Compatible VCOs
Historically, synthesizer designers have relied on YIG oscillators, characterizing broadband operation with excellent phase noise performance. The YIG oscillator offers linear tuning characteristics that simplify the synthesizer coarse-tuning algorithm in multi-loop schemes. These unique features allowed the YIG-based synthesizers to dominate over the last decades. But YIG oscillators are power hungry and require larger real estate area, which recently contributed to a transition to printed coupled resonator-based solid-state VCO architectures. Since the printed resonator-based VCO noise performance is inferior to its YIG counterpart, care must be taken in choosing spectral pure reference frequency sources (crystal oscillators). The typical phase noise performance of commercially available 100 MHz crystal oscillators is −168 dBc/Hz at 10 kHz offset from the carrier. The phase noise at 10 kHz offset for a 100 MHz crystal oscillator can be translated to −128 dBc/Hz for a 10 GHz output, which even supersedes the performance of commercially available low cost YIG oscillators
In summary, prior art systems comprise a stable signal from a single-frequency oscillator (typically in the 1-100 Mega-Hertz range). To synthesize arbitrary higher or lower frequencies prior art systems processes the single-frequency signal through analog RF multipliers, mixers and band pass filters. In typical prior art, many circuit stages of multiplication, mixing and filtering are required to synthesize the final desired signal.
Prior art synthesizers are costly. Typical 2013 prices exceed US $100,000 for a single channel of synthesized signal. Prior art systems are limited in the speed at which they can be commanded to change to a new output frequency (typically 300 nano-seconds to 1 micro-second). Prior art systems are physically large weighing typically 50 lbs or more and require typically more than 100 watts of input power to operate. Reference Comstron Model FS-5000 and similar variant models manufactured by Comstron, Inc.